Publication date: 25 May 2010
Embedded systems designers have long looked to FPGAs as technology that could transform their designs and liberate their design methodology. But the brass ring always appeared just out of the designer’s reach.
Since the early years of embedded processor design and FPGA design, both silicon advancement and design techniques for each have evolved independently—two very distinct design flows, styles, and engineering disciplines.
FPGA vendors have approached the problem by consistently adding more features and functions to their architectures, to give embedded designers a greater utility to the FPGA’s already renowned flexibility.
Vendors began adding “soft” processors to the mix to add value to the FPGA choice. But soft processors use the FPGA’s own programmable logic to build the processor core. That uses up some (perhaps most) of the FPGA’s logic, leaving little left over for other circuitry, which defeats the purpose of using an FPGA in the first place.
As subsequent generations of soft processors side-stepped the fabric-eating problem, mixed-signal FPGAs entered the picture, adding the complexity of analog into the mix.
Embedded systems designers are hungry to take advantage of these technology advances but less willing to pay a price wrestling with the complexity this brings. In some cases, they’re dealing with, in effect, three parallel designs: the FPGA, the embedded processor and the analog design. These roles may be filled by three different designers, two designers, or even just a single designer, but all must be able to work on their portion of the device in parallel to avoid the issues of working with soft processors in FPGAs where the design cycle gets elongated.
As FPGA and embedded functions have grown closer together on the board and in some cases merged onto the same chip, have the engineers working on these designs—or the tools they use—really evolved along with the silicon?
Since FPGA and embedded designers are a well‐established group of users, the design flow must appeal to both sides and not have a significant learning curve.
These issues informed the thinking behind a new FPGA, architected with the embedded designer—and this mounting technical and design-flow complexity—in mind.
The Actel SmartFusion family takes all the traditional advantages of the company’s flash-based FPGAs (low power, high security, flexibility) and combines them with equally flexible analog circuitry and the world’s most popular embedded processor, ARM. It’s all rolled up in one package, and all under the designer’s control. It’s a single “super chip” that could very probably be the only chip in a designer’s system.
The processor is programmable (through software); the FPGA is programmable (through normal FPGA design); and the analog circuitry is programmable (through clever configuration software).
And for the three domains typical in an engineering team—software, logic design, and analog—all three will be comfortable with SmartFusion. In addition, even better is that a single engineer working alone can also use SmartFusion as a universal, all-in-one component to realize almost any design. All three design tools and domains are integrated, and all three talk to one another. It’s the first real synthesis of the three major branches of embedded development.
SmartFusion chips are based on the popular ARM Cortex-M3. The M3 is among the world’s most popular 32-bit processors, and its inclusion in the family marks the first time a 32-bit processor has been available next to the FPGA fabric.
Unlike a lot of RISC processors, the 100 MHz Cortex-M3 has a hardware multiplier and divider, so designers won’t have to do these basic math functions in software. It features 16KB to 64KB (depending on the specific SmartFusion chip) of high-speed SRAM, along with 64KB to 512KB (again, depending on the chip) of nonvolatile flash memory.
Every SmartFusion has at least one SAR ADC (successive-approximation register analog-to-digital converter). The converter converts voltage into an 8-, 10-, or 12-bit number (your choice) and can do this at 500 or 600 KHz (depending on the resolution). That means you can take half a million sample per second, which ought to be enough for anybody. The ADC is fed by a 16-to-1 multiplexer, the idea being that you can sample 16 different analog inputs simultaneously but you’re only going to read the digital value from one at a time. It also features a first-order sigma-delta DAC with effectively 12 bits of resolution.
The architecture’s “analog computing engine” (ACE) provides some limited intelligence that you can program, allowing the analog circuitry to follow sequences and look after itself without so much processor intervention. The ACE can also launch an analog conversion (either direction: ADC or DAC) based upon a signal coming from the FPGA portion of the chip. Conversely, the ACE can interrupt the Cortex-M3 processor when some even occurs, such as when a particular sampling level is detected or reached.
The signal pathways are designed for robust performance—with a wide path between the analog circuitry and the FPGA fabric, allowing the programmable logic to be deeply integrated with the programmable analog circuitry, and vice versa.
A second interface, between the analog and processor realms, allows the processor to sees the analog block as a peripheral (or several peripherals) so it has no trouble reading and writing values to and from it. From the analog perspective, it sees the processor as a digital source or sink, much like the digital side of a DAC or ADC. In short, it works pretty much like you’d expect it to.
While the technological achievement is significant, it’s the architecture’s utility that’s key for embedded systems designers.
The integration value is apparent: Almost any embedded application that uses a 32-bit MCU needs to have ADCs and DACs to talk to the real world and some glue logic to tie everything together. An integrated, one-chip solution saves board space and BOM cost.
In addition, SmartFusion simplifies the work of industrial applications design that require using a microcontroller. Each industrial application has its unique requirements. The embedded systems designers needs to search through endless online catalogues to find the right MCU and then marry it to the right analog circuitry—a time-consuming, inefficient process, especially when market deadlines loom.
SmartFusion allows a designer to create his own controller, customized to his application’s precise needs.
The history of the semiconductor industry is marked by innovation in specific technologies that eventually get integrated with other technologies to create a solution that’s far greater than the sum of its parts. A new chapter in that tradition has opened for embedded systems designers.
Sharon Blades joined Actel in 1996. She manages Northern Europe, Israel and Russia, and over the last thirteen years has grown her sales region to one of the largest within Actel. Prior to joining Actel, Blades held field applications engineering and product marketing roles with various distributors including Rapid Silicon and MMD. Prior to that, she was a development engineer in the electronics department at Hoover PLC. She holds a Higher National Diploma in Microelectronics and a master's degree in business administration from Brunel University at Uxbridge in Middlesex UK.
