Publication date: 06 May 2008
The basic LIN network consists of a single master node and several slave nodes, interconnected by a single communication wire that produces a wired “AND” function.
Communication is at up to 19.2kbit/s and signalling uses two electrical states called recessive and dominant, representing logical 1 and 0, respectively.
While all the transmitters on the bus are in the passive state, the bus voltage remains close to the battery supply level, due to a 1kW pull-up resistor within the master.
A dominant state occurs when a transmitter actively pulls down the bus line towards the ground potential.
This simple arrangement, however, presents designers with a variety of challenges, in particular in terms of node addressing and fault detection. Each node has a unique address assigned on start-up or reset, prior to the start of normal-mode communication.
This is typically implemented in one of two ways: by hardwiring, OTP-bit programming, special connectors or DIP-switch setting at the slaves; or by an auto-addressing process known as Slave-Node-Position-Detection (SNPD), in which the master assigns node addresses at power up.
Hardwired or manual programming techniques mean that configuring a system or replacing a defective node either requires manual intervention, or relies on the availability of a stock of nodes with different LIN addresses.
Auto-addressing, in contrast, means that functionally identical modules can be connected to the LIN network without the need to distinguish their addresses.
The process assigns addresses to individual nodes based on their position on the bus.
Automated node-position detection is therefore an integral part of auto-addressing and both terms – node-position detection and auto-addressing – are sometimes interchanged.
The wired AND connection used within the basic LIN system (Figure 1) means that none of the nodes has any means to determine its position on the bus relative to the other nodes.
The bus connections are electrically equivalent. In order to enable node position detection and, by this means, auto-addressing, additional measures must therefore be taken to make it possible for each node to determine its relative position on the bus.
One method for achieving this splits the LIN line at each node so that the node physical layer can electrically distinguish between two bus portions branching from the node (Figure 2).
Each node has two LIN connections and the nodes are connected in a “daisy chain”.
A sense resistor (typically 1W) and current source (typically 2mA) is included within each slave node: the slave furthest from the master, having only a single connection to the bus (there is no node “downstream”) sees no additional current and can therefore be identified and apportioned an address by the master.
Once the slave has an address, it ceases to participate in the position detection process, by disabling its current source.
The “next” slave in line therefore now takes on the appearance of the “last” in the chain. The process continues until all of the slaves have an address.
One of the difficulties of this technique is that it requires quite precise current measurements, in an automotive environment that is typically prone to EMC and other electrical disturbances.
The process can be quite time-consuming, since disturbances lead to false position detection; and it requires a fixed topology with the master and the slave nodes interconnected as a single unbranched linear bus with the master on one end.
Finally, in the event of a failure the system can deliver no information on the position of the failing node.
These difficulties can be overcome by an alternative operating principle proposed by ON Semiconductor (Figure 3).
The same generic principal is retained, but each node includes a high-voltage (HV) switch that allows the slave to either propagate or block the communication between the two portions of the bus.
The process for apportioning addresses (Figure 4) begins on startup or reset, when the slaves enter an initial state with their HV switches open.
All the portions of the LIN bus are separated and only the slave connected directly to the master will be able to react to incoming LIN message headers from the master.
After the master sends an initialisation command, this slave takes an address and closes its HV-switch to the following portion of the bus.
This allows the second slave to communicate with the master to get its address in turn. The process continues until all nodes have got an address.
In practice, switch-based systems, while following the basic principle outlined above, generally move the switch functionality from the external electrical nodes LIN1 and LIN2 into the low voltage part of the transceivers (schematically shown in Figure 5).
Effectively, each slave contains two instances of a full LIN transceiver.
The propagation or blocking of the information flow is achieved by the control of the logical signals going to the individual transmitters and coming from the individual receivers.
This removes the need to build switches that can withstand the challenging environmental conditions common in automotive systems – especially pulse disturbances, system ESD and EMC – and improves robustness.
The logic interconnecting both transmitters and receivers in every slave node has to ensure correct propagation of the bus signals in both directions in order to guarantee that the individual wire portions logically behave as a single bus during normal operation.
Data received on one of the LIN connection pins must be transmitted to the other, and vice versa. The digital block therefore functions essentially as a repeater system.
One aspect of such a design that requires finesse is ensuring that the system timing is correct (figure 6). When a dominant state is received on one of the LIN interconnection pins, it must be immediately repeated to the other LIN pin and hence on up the daisy chain.
However, when the initial dominant state ends, the repeatering mechanism inevitably passes this change along the chain with a slight time lag.
As a consequence, a persisting dominant state can itself be repeated back to the original initiating part of the network, leading to an interlock state in which both buses would permanently remain dominant. Therefore an extra delay must be introduced, during which the bus state is not regarded as valid for repetition.
This delay must cover the worst-case overall delay of the repeater system. The logic implementing the extra delay is called feedback suppression. Of course, the same argument applies in both directions – the repeater functionality, including the feedback suppression, is therefore fully symmetrical towards both LIN connections.
As well as taking steps to avoid interlocks, the designer must also ensure that signal propagation delays are accounted for within the system. The insertion of repeaters inevitably introduces such delays, because each signal must first be properly received, and only then can be re-transmitted.
As each slave node includes a repeater, the total signal delay through the bus must be taken as the sum of all partial delays of all bus line portions. It is this total delay that needs to be considered when designing the LIN schedule tables for the system. However, calculations and simulations demonstrate that the impact of this delay is acceptable for almost all LIN applications.
The use of the dual-repeater method of connection and addressing overcomes many of the limitations of the basic LIN system. In particular, it allows the master to localise a defective slave node, because the master has immediate feedback on the success of the address assignment. In addition, the node position detection is based on message exchange at normal signal levels, which means that the robustness of the auto-addressing process is as high as that of normal mode communication.
Another advantage of this technique is the simplicity of the design – only the basic LIN transceiver is used twice in the same node, with a purely digital interconnection. In contrast, the current-measurement approach requires the design of a relatively precise voltage measurement circuit intended to operate under harsh conditions. A dual-LIN node is therefore easier and faster to design, thus decreasing the cost and the risk of development.
Moreover, it is possible to deploy topologies other than a single linear bus with the master node on one extremity. A tree topology, for instance, can be implemented by connecting each dual-LIN node to two of the “branching points” of the tree structure (Figure 7).
Correct node-position detection is possible, because the auto-addressing process can still distinguish on which branch the node is connected. By the same token, it is also possible to implement other more complex topologies such as loops and nested loops.
The position detection method with dual-LIN nodes is fully compatible with the LIN specification and, in addition, enables a mixed topology where both standard LIN nodes and dual-LIN nodes are used – this is also the case for many non-linear topologies.
These developments significantly increase the ability of the LIN bus architecture to continue to satisfy the needs of automotive system designers. By using normal signal levels, the dual-node auto-addressing system ensures robustness, while introducing improvements in fault-tolerance, and the ability to more quickly identify and rectify faults.
Unlike existing current measurement techniques, it does not require precise analogue components and measurements, and so requires less effort and less risk in design, improving time-to-market and cost-effectiveness. Finally, its use is not restricted to linear bus technologies, allowing the designer to deploy whatever topology is most appropriate to the application.
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