Publication date: 08 January 2008
The production of analog and digital ICs is essentially different. Digital ICs provide a functionality, which is tested with scan patterns, whilst analog ICs specify the performance of their functionality. Furthermore, this performance will drift over temperature and the test equipment has a limited accuracy and repeatability, which has to be controlled regularly. Several tools need to be defined to ensure a long-term and stable performance. At Texas Instruments, these tools are known as ‘Temperature Characterization’, ‘Lab-to-Final Correlation’, ‘Capability Study’, ‘Correlation Lockout’ and the ‘Quality Control Run’. This article describes these tools.
Analog ICs do not only specify digital logic levels, functionality and speed, but also analog accuracy. For operational amplifiers, these specifications could be a maximum offset error of 100mV, an open loop gain above 120dB, a noise density as low as 1.1 , a total harmonic distortion of -100dB or the power consumption. Typical specifications of Analog-to-Digital Converters (ADCs) are the offset error, the gain error, differential and integral linearity, the noise performance and many more. The test accuracy for ADCs often has to be in the order of micro volts.
If these critical parameters are ensured with minimum and maximum values in the datasheet, then these parameters need to be measured for each single device. A pure functional test or statistical test is not sufficient. In addition, guardbands have to be implemented between the datasheet limits and the final test limits. These guardbands will cover for parameter shifts like temperature drifts or limited test accuracies. A correlation test is implemented to ensure a long-term accuracy of the test system and a quality control run is added at the end of the production test to ensure that the test system remained stable during the production
Parameters of analog ICs drift over temperature. The open-loop-gain of an operational amplifier, for example, would shift, which effects the regulation of the output voltage, so that the amplifiers offset will drift also. The specifications inside a datasheet are ensured over a defined temperature range, which is typically -40ºC to 85ºC for industrial products. Ideally, an IC needs to be tested over the complete temperature range in the production test. Unfortunately, this is technically and economically unrealistic. For high end products, the costs for the test at room-temperature already exceed the die costs. Furthermore, at negative temperatures, the humidity of the air condenses and freezes on the test boards. The condensation causes leakage currents and shorts, which destroys the repeatability of the test.
An alternative is an extensive characterisation of the IC behaviour over the temperature range. The data of the characterisation is used to determine the average drift and the drift variation of each specification in the datasheet. The average drift plus three times the standard deviation is used to determine a maximum drift. In this way, final test can run at room temperature only, if the maximum drift is subtracted from the minimum and maximum specification limits. The test at room temperature does not test to the specification limits of the datasheet but to the reduced limits, which are called final test limits. The delta between the datasheet specifications and final test limits are called guardbands.
If for example the offset of an analog-to-digital converter is specified to ±500mV, and the maximum negative and positive drift were evaluated to +154mV and -146mV, then the final test limits are 346mV and -354mV. A part can only be sold if it passes these final test limits.
This example is further illustrated in figure 1, figure 2 and table 1. Figure 1 shows the distribution of the offset of 100 ADCs at different temperatures. The offset drift is then calculated for each ADC separately. The distribution of the drift is shown in figure 2.
Table 1: Calculation of the guardband in respect to the temperature characterisation
The characterisation above studies the drift over different temperatures. In a similar way, the capability study evaluates the shift of parameters for different test systems. A contaminated contactor could cause a high resistive ground connection of the device under test, so that internal settling times increase. In addition, the accuracy of the test equipment itself is limited.
Furthermore, the test systems have the capability of testing several devices in parallel. Therefore, a test board has to provide several sites, which are routed back to different resources in the test machine. Even if these sites are kept symmetrical in the PCB layout, the wiring to these resources has to differ and will cause a shift of parameters, which can be more or less significant.
A device with parameters, which are out of specification, might be tested ‘good’ due to the test tolerances. The goal of the capability study is the generation of guardbands for test inaccuracies. Different test boards, test sites and test machines are taken into account.
For the capability study, 24 units are tested at each site of at least two test boards. The measurement is then repeated on at least one more test machine. Figure 3 shows typical data for such a capability study for the example of the offset measurement. ‘c1’ and ‘c2’ express the used test systems and ‘b3’ and ‘b4’ the two test boards. This data is used to calculate the standard deviation of the test accuracy for each specification.
Figure 3: capability study of the offset of an analog-to-digital converter
Identical to the temperature characterisation, three times the standard deviation is added to the guardband. If the standard deviation of the temperature and the capability study show both a Gaussian distribution, then they can be added geometrically. In this way, the total guardband can be calculated to
(1)
In the example of figure 3, the test accuracy of the offset has a standard deviation of 37mV, so that the final guardbands are calculated as shown in table 2:
Table 2: Test limits calculated with a guardband for temperature drift and test accuracy
The example shows that ICs are tested ‘bad’, if the offset exceeds the limits of 0.283mV and -0.282mV. These limits are nearly half of the guaranteed specifications.
The capability study above is used to cover variation of different test setups. Unfortunately, this will not guarantee that a parameter is measured correctly. If for example the bandwidth of the driving amplifier of the ADC inputs is too low, then the MSB transition can show distortion. This effect can partly be compensated for by trimming the length of the MSB differently. If the trim and the production test are done together on the final test system, then the customer might receive miss-trimmed products. The Lab-to-Final Correlation should avoid such problems.
For high-end products, two different test solutions are typically in use. One is used in the laboratory by the development engineers to study and to continually improve the performance of a product. The second test solution is used at the test system for the mass production.
For the Lab-to-Final Correlation, ten units are tested at both test setups. The production test is only approved, if the data between the two correlates within the capability guardband. The Lab-to-Final Correlation therefore ensures the initial accuracy of the production test, but it does not guarantee the performance over time. This is controlled by the correlation lockout.
The capability study is used to determine a guardband for a maximum error of a test solution. For a long-term stability of the test solution, the test setup needs to be controlled, so that its inaccuracy does not exceed the maximum error, which was determined in the capability study. Such a case can for example occur, when a contactor is contaminated or worn out, what easily can happen after testing millions of ICs. The contamination would increase the contact resistance, which can influence the offset or linearity, if the affected contacts include analog input pins or supply pins.
For the correlation lockout, the data of ten known units is stored in the system as part of the development process. Before a production test is started, these ten units are retested and the data is compared with the initial data. If it does not differ by more than the guardband of the capability study, then the production test can be started. If the data differs more than the guardband, then the test setup is not valid and has to be improved.
The correlation lockout proves that the test accuracy is valid at the start of the production. Unfortunately, components might break during the production test. For example, a relay might break, so that voltages remain active after turning off the supply current of a device under test. This can damage at the IC. As another example, an IC can get clamped inside a contactor. All following ICs are only pressed on top of the clamped IC, so that the clamped IC is tested over and over again instead of testing the following ICs.
Such problems can be identified by running some of the tested devices a second time. Here, the devices are not tested to the final test limits, but to the specification, which are guaranteed in the datasheet.
The amount X of devices, which need to be re-tested, can be calculated with the typical test yield and the maximum allowed probability that ‘bad’ devices are shipped to customers. The following equation is valid, if the typical test yield is 95% and the failure rate of shipped devices should be less than 1ppm.
or
270 devices need to be re-tested to support a failure rate below 1ppm.
The complete quality flow is shown in figure 4. This flowchart is separated into two areas. The first one covers the tasks, which have to be implemented during the development process. These are the Lab-to-Final Correlation as well as the temperature characterization and the capability study, which are used to calculate guardbands for the production test.
The production flow is shown in the second area. Before the production start, the correlation lockout needs to pass. If it passed, the production to the final test limits can be started. After finishing the production, the quality control run needs to be performed. The devices can be shipped to customers, if all these tests passed.
Figure 4: Flowchart for quality control
Frank Ohnhäuser studied electrical engineering at the Friedrich-Alexander-University in Erlangen (Germany). Since 1996, he works on the development of analog to digital converters with the Burr-Brown Corporation (acquired by Texas Instruments in 2000). He specialized in fast SAR ADCs and ADCs with simultaneous sampling for motor control
