Publication date: 26 September 2011
It’s quite common for a power supply (PSU) designer to work with a circuit designer to realize a system design compliant with international EMC regulations. PSU designers will be well aware of the requirement of the power supply to provide clean DC voltage and not disturb the AC mains voltage. However, they may not have any idea of the noise that can potentially be introduced to the mains through the PSU by the target circuit. Likewise, the circuit designers (digital or analogue) may not know what attenuation the PSU will provide.
The aim of this article is to bridge this gap, to provide a method for testing the DC circuit in isolation from its final PSU and enable additional filtering to be specified. The examples given are intended to address the following EMC standards: FCC 15J/SUB Part B, VDE 0871, CISPR 16, CISPR 22, EN 55022, EC Directive 2004/108/EC.
There are no specified EMC limit lines for DC rails, so there are no specific tests, for example in the EC or CENELEC regulations, that can be applied directly in this situation. Likewise a PSU and the DC supplied circuit may be considered as sub-systems, possibly even components; as a result, they may be exempt from the EC directive. The tests conducted can therefore only be considered as pre-compliance tests; the end system would have to be fully compliance tested for full CE certification. However, if the system is to be certified via the Technical Construction File (TCF) route, the individual pre-compliance tests may be used as part of the TCF.
Having no EN standard means implementing the closest equivalent test standard to the existing EMC regulations for mains-borne emissions.
Input line effects are removed from AC mains connected systems by using a line impedance stabilization network (LISN) on both live and neutral lines and referenced to the mains earth as a ground plane. For our test method, we will use this approach for the testing of DC supplied circuits. Using an appropriate DC PSU, both the positive and ground (or 0 V) lines are filtered with a LISN referenced to earth. Each LISN is constructed in accordance with CISPR 16 for 50 Ω / 50 μH line impedance (see Figure 1).
If the DC supplied circuit has no direct earth connection, the path for any common mode noise is through stray capacitances to earth. These may be from the physical body of the circuit, external wiring or through any peripheral load or circuit connected. Noise measurements in this case are only relative. Be sure to take an accurate record of the test set up to allow comparative measurements later on. Note that though the target measurement is common mode noise, even with no stray capacitance to earth from the circuit under test, a terminated LISN meeting CISPR 16 will output a signal of half of the differential mode noise level from its RF monitor.
The DC powered circuit under test (CUT), LISN and all cables connecting any measurement equipment, loads and supply lines should be shielded if at all possible. The shielding is to prevent possible pick-up on cables and the CUT from external EMC sources (e.g. other equipment close by, radiated emissions from the PSU etc). The shielding is again referenced to mains earth.
When measuring small circuits or individual components, the whole part can often be fitted into a metal enclosure for testing. All power and test entry points should be via shielded connectors, preferably high frequency BNC types. The LISN should be shielded and external to the enclosure containing the test circuit (see Figure 2 where a DC-DC converter is the circuit under test).
There are innumerable circuit configurations that could be used as an example test circuit. For this article we are using a board level DC-DC converter with a resistive output load. Board level DC-DC converters are a commonplace item on many PC boards, and in instrumentation and process control equipment. The advantage of using a DC-DC converter as an example is that it has a known characteristic switching frequency (see Figure 3), so a stable noise spectrum can be obtained easily.
For our example detailed below, the DC-DC converter used was a Murata Power Solutions NMS1212C, 12 V input, 12 V dual output device delivering a total 2 W of power with a typical characteristic switching frequency of 35 kHz. This device has a number of line spectra below the EC lower frequency limit for conducted emissions (150 kHz), and no sub-harmonics below its fundamental switching frequency.
To ensure worst-case conditions for EMC are applied to the CUT, knowledge of the circuit’s operation is needed, so the CUT designer is usually the best person to specify these.
In the case of the NMS DC-DC converter, worst-case is at full load (i.e. 2 W output) with maximum input voltage (see Figure 4), although the input voltage actually has a minimal effect within its allowed tolerance. Other worst-case conditions may be difficult to apply (e.g. high temperature, see Figure 5) due to the nature of the test environment. However, some understanding of how these conditions may affect the EMC performance should be considered.
Where circuit loading conditions and their effect on EMC are not known, tests can be done in-situ on the CUT prior to the pre-compliance test.
One of the first problems may be to decide on the resolution bandwidth required for the pre-compliance tests. To maintain compatibility with the EC directive for mains emissions, a 9 kHz resolution bandwidth (RBW) should be used for conducted line measurements. In circuits with only a few line emissions this may be suitable, however, with analogue processing circuits or asynchronous logic there are likely to be some wideband spectra. It’s also possible that individual line spectra may change with loading conditions, but within a predefined envelope – widening the RBW can encompass this envelope.
If we consider the NMS example again, as a square wave push-pull converter there are two main responses, one at the switching frequency (35 kHz) and another at twice the switching frequency (reflected full wave rectification, see figure 3). There are also harmonics of these across the whole emissions spectrum (falling significantly at 5 MHz, see Figure 6). In the frequency range of interest between 150 kHz and 30 MHz, there are therefore 853 individual line spectra if resolved at 9 kHz RBW. Variation in tolerance of components, input voltage and loading could change the operating frequency by as much as 20 %, hence more than 200 additional lines could be added or subtracted. Overall the envelope tends to remain fairly constant, so simply widening the RBW to 120 kHz gives the envelope function and not the individual line spectra (see Figure 7). The information is now easier to use and understand and possible variations should be encompassed by this envelope.
Widening the RBW should only be done in situations where there is wideband noise or a large number of closely related individual spectra. This is not necessary in the majority of circuits. Do note that when using a spectrum analyser, the effective noise floor is raised when the RBW is widened, swamping out the lower level measured noise. We would advise that it’s always worth trying the narrowest RBW first, then widening as necessary.
There are three common methods of measuring amplitude of conducted line spectra; peak detection, average detection and quasi-peak detection. Peak detection is the instantaneous measurement of the peak amplitude of the signal, best for continuous wave spectra and quick ’snap-shots’ of the emissions. Average detection measures the average amplitude over a time period, within the measurement bandwidth. Quasi-peak detection is designed to simulate a subjective human type response to pulse type interference. Quasi-peak weights rise and fall times of the pulsation of a signal with particular time constants.
The response to a continuous wave signal would be identical with all three detection methods. Infrequent pulsed interference would be lower via quasi-peak detection and highest using peak detection.
If the emissions exceed desired limits, you could redesign the circuit or change the PCB layout to reduce noise. You could also consider adding additional filtering at the PSU input to the DC circuit.
Filtering may be the lowest cost option for getting the circuit through pre-compliance tests. If redesign represents a major investment in time and money, simply adding a capacitor and inductor to the input line may drop the noise by 20 dB at the problem frequency at minimal cost. Alternatively you may even have to specify to the PSU designer that the PSU must give a specified noise rejection, 20 dB to noise below 1 MHz, for example.
The standard EMC limit lines can be placed as overlays on the noise emissions to determine what rejection the PSU requires. Often this is not quite as straightforward as it sounds - PSU output capacitors and CUT input capacitors may result in a significantly higher rejection than would be suggested by simply using 50 Ω noise sources (the PSU and CUT are unlikely to have 50 Ω impedance, or even matched impedances). These tests are only intended for pre-compliance and further tests with the PSU and circuit in the target system will have to be conducted prior to certifying the completed product.
